Semiconductor memory device having circuit for monitoring set value of mode register

摘要

A central control circuit in a semiconductor memory device includes a command decoder and an MRS output circuit. The command decoder decodes an internal control signal. The MRS output circuit generates a control signal for writing a set value of a mode register into a memory cell. According to the control signal, the set value of the mode register is transferred to a data input/output line. A data input/output buffer receives data from the data input/output line, and the data is written into a specific memory cell. The written data is output at a data input/output pin by a normal read operation. A semiconductor memory device allowing externally monitoring a set value of a mode register is thus provided.