摘要 |
PROBLEM TO BE SOLVED: To output accurate digital pulses by changing the output of a low-pass filter applied to the output, where delay data for an oscillation pulse signal are converted to an amount of delay and shifting the pulsive waveform by a specific amount for the edge of a frequency-dividing pulse signal. SOLUTION: Delay time is determined by a computing means 2 at a CLK timing from an oscillation circuit 1, based on a frequency command from a command means. The output is converted into an analog voltage through a D/A converter 3 and is outputted from an inverter(INV) 5 of a Schmitt trigger input via a low-pass filter 4 consisting of a resistor R and a capacitor C. When the output of the D/A converter 3 is changed as 0 to 255 to 0, delay data are set during one cycle of a CLK signal. When the delay data are set to 255, an RC time constant of the low-pass filter 4 is set so that it does not exceed the boundary voltage between 0 and 1 of the input of the INV 5 in one clock of a CLK signal, thus smoothly and monotonously changing the frequency signal. |