发明名称 PACKAGE FOR SEMICONDUCTOR AND MANUFACTURE OF THE SAME
摘要 <p>PROBLEM TO BE SOLVED: To provide a structure for the package of a semiconductor for adopting the miniaturization and simple mounting method of the package, and a method for manufacturing it. SOLUTION: An insulating layer 3 which can be plated on a part except the head of a first bump and a prescribed conductive wiring pattern formed by an end batch processing is formed on a wafer-shaped semiconductor substrate 1, and a second bump 7 is provided as an outside connecting terminal at the electrode part of a plated wiring conductor 5, formed continuously at the head of the first bump so that facedown solder reflow mounting on a wiring substrate can be attained.</p>
申请公布号 JPH11145200(A) 申请公布日期 1999.05.28
申请号 JP19970317791 申请日期 1997.11.05
申请人 KOKUSAI ELECTRIC CO LTD 发明人 NAGANO TAKAHIRO
分类号 H01L21/60;H01L23/12;(IPC1-7):H01L21/60 主分类号 H01L21/60
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