发明名称 SYNCHRONIZATION SYSTEM FOR DETECTING FSK-MODULATED DATA
摘要 <p>PROBLEM TO BE SOLVED: To provide the synchronization system by which out of synchronism is prevented by predicting a data start position based on past reception results even when a radio wave state is deteriorated and a start bit cannot be detected. SOLUTION: In the synchronization system of this invention that executes a start bit detection synchronization step S41 which detects data by outputting a quench pulse for detecting the data based an a start bit detection point being a change point from a stop bit to a start bit, the step S41 stores timing data of start bit detection points, stops data detection by the start bit detection synchronization in the case that is regarded that the timing of the start bit detection points is stable based on the stored data, outputs a prediction timing in matching with the stabilized timing and outputs a quench pulse based on the prediction timing to execute a character frame synchronization step S42 where the data are detected, and the step S42 transits to the step S41 when the predicted timing is deviated from the actual timing in excess of the allowance.</p>
申请公布号 JPH11112584(A) 申请公布日期 1999.04.23
申请号 JP19970272919 申请日期 1997.10.06
申请人 KOKUSAI ELECTRIC CO LTD 发明人 SAKAI SHIGETAKA
分类号 H04L27/14;H04L7/04;H04L25/40;H04L29/08;(IPC1-7):H04L27/14 主分类号 H04L27/14
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