| 摘要 |
<p>A stacked gate portion, including a tunnel insulating film, a floating gate electrode, a capacitive insulating film and a control gate electrode, is formed over a p-type Si substrate. In the p-type Si substrate, n<++> source/drain layers and n<+> source/drain layers, each layer containing arsenic, are formed. In the drain region, an n<-> drain layer, containing phosphorus and overlapping with an entire edge of the stacked gate portion in the gate width direction, and a p layer surrounding the bottoms of the n<+> and the n<-> drain layers are provided. In such a structure, an electric field applied between the floating gate electrode and the drain is weakened and the drain-disturb characteristics are improved during writing. <IMAGE></p> |
