发明名称 SHORT CELL MULTIPLEXER
摘要 <p>PROBLEM TO BE SOLVED: To provide a short cell multiplexer capable of reducing the burdens of the change processing of the read order of short cells while suppressing a cost. SOLUTION: In the order specifying means 20a of this short cell multiplexer, in respective read interval setting registers 64a-64c, read intervals corresponding to quality classes 1-3 are set. Also, in counter memories 61a-61c, the number of the read short cells 1 is stored. The order specifying means 20a specifies the quality class for which the number of the short cells reaches the read interval based on the respective read intervals and the number of the read short cells and instructs the read of the short cells of the class.</p>
申请公布号 JPH1188360(A) 申请公布日期 1999.03.30
申请号 JP19970247091 申请日期 1997.09.11
申请人 FUJITSU LTD 发明人 ONO HIDEAKI;TAKECHI RYUICHI;KATO TSUGIO;SASAKI HIROSHI;SASAKI TAKAYUKI
分类号 H04Q3/00;H04J3/16;H04L12/815;H04L12/863;H04L12/865;H04L12/951;H04Q11/04;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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