| 摘要 |
A soft switched PWM AC to DC power converter for a DC power supply is disclosed. The power supply includes a power factor corrector (PFC) converter with a power boost topology, a DC/DC converter with a forward topology and a fly-back converter which serves as an auxiliary power supply for the controller components. The three converters are synchronized by a gate array logic (GAL) IC to minimize EMI noise. The GAL also conditions the PWM for the PFC and the DC/DC converter to provide very precise switching control. Synchronizing and PWM timing signals are derived by the GAL using a high-speed clock signal that is input to the GAL as a data input. The clock signal is repeatedly divided using synchronous division to yield a digital monostable timing signal that enables very precise control of converter switches.
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