发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To enable a MOS transistor to be easily optimized in function by a method, wherein a gate electrode and source/drain diffusion layers of a first N channel-type MOS transistor are formed, and then a gate electrode and source /drain diffusion layers of a second N channel-type MOS transistor are formed. SOLUTION: A gate electrode 7 of a first N-channel MOS transistor used for a peripheral circuit is formed, phosphorus ions are implanted into all the surface, and a thermal treatment is carried out to form a first N-type lightly doped diffusion layer 9. Then, a spacer insulating film 11 is formed on the sidewalls of the gate electrode 7 and a polysilicon layer, and an N-type heavily doped diffusion layer 13 is formed in the region of the first N-type lightly doped diffusion layer 9 as it is self-aligned with the gate electrode 7 and spacer insulating film 11. Then, the gate electrode 15 of a second N-channel MOS transistor used for an inner circuit or a memory cell and a polysilicon film are formed, arsenic ions are implanted into the entire surface, and then a thermal treatment is carried out to form a second N-type lightly doped diffused layer 17.
申请公布号 JPH10275865(A) 申请公布日期 1998.10.13
申请号 JP19970080834 申请日期 1997.03.31
申请人 NEC KYUSHU LTD 发明人 CHISHIKI SHIGEO
分类号 H01L21/28;H01L21/336;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108;H01L29/78 主分类号 H01L21/28
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