| 摘要 |
PROBLEM TO BE SOLVED: To obtain a high density mounting array of vertical semiconductor devices having a pillar and a deep trench capacitor and a method for generating it. SOLUTION: A pillar 230 functions as a transistor channel, and is formed between an upper doped region 240 and a lower doped region 405. The region 405 is a self-alignment type, and disposed under the pillar. This array has a column of bit lines 314, and a row of word lines 275. The lower doped regions 405 of all the cells are separated without increasing a size, and maintained in minimum area of the cell. Deep trench capacitors 405, 580, 585 do not increase array area, and hence the array is adapted to DRAM application of gigabits. |
