发明名称 Method and apparatus for redundancy circuits using power fets
摘要 A circuit used in combination with a redundant power supply system to electrically disconnect its failed power supplies. The circuit comprises a power FET, a rectifier and filter circuit, a start-up circuit and a shut-down circuit. The rectifier and filter circuit rectifies an input AC waveform and subsequently filters a resultant DC voltage which is subsequently used to supply an output voltage at an output terminal connected to the power FET. In parallel with the rectifier and filter circuit, the start-up circuit is coupled to a gate of the power FET to ramp the voltage supplied to that gate slowly turning on the power FET. Coupled in parallel with the start-up circuit, the shut-down circuit conducts voltage from the gate thereby turning-off the power FET to preclude current from other power supplies of the redundant power supply system to pass current to its failed power supply.
申请公布号 US5811889(A) 申请公布日期 1998.09.22
申请号 US19960613375 申请日期 1996.03.11
申请人 INTEL CORPORATION 发明人 MASSIE, HAROLD L.
分类号 G06F1/26;H02J1/10;(IPC1-7):H02J1/10;H01H47/00 主分类号 G06F1/26
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