发明名称 |
Error detection decoder and error correction for digital radio communications |
摘要 |
The decoder uses a Viterbi decoding of the digital input signal, and adds (2) a flag signal at a first location in the signal where the difference between the metric value of the path in the Viterbi decoding algorithm is less than a threshold value. Flag signals are continuously added at locations preceding this first location, determined by a reverse tracking process. A decoder (5) uses a block code to decode the signal that has been decoded by the Viterbi decoder, treating the locations marked with a flag as signal erasure locations. The digital input signal has several bits forming a symbol, and the decoder applies a Reed-Solomon decoding using this symbol. |
申请公布号 |
FR2754960(A1) |
申请公布日期 |
1998.04.24 |
申请号 |
FR19970013058 |
申请日期 |
1997.10.17 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
NAKAMURA TAKAHIKO;YOSHIDA HIDEO;FUJITA HACHIRO |
分类号 |
G06F11/10;H03M13/00;H03M13/29;H03M13/41;H04L1/00 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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