| 发明名称 |
INTEGRATED CIRCUIT COMPRISING A SUBSTRATE AND A WIRING LAYER WITH A BUFFER LAYER BETWEEN THE SUBSTRATE AND THE WIRING LAYER |
| 摘要 |
<p>A thin-film ferroelectric capacitor (20) includes a bottom electrode structure (26) having an adhesion metal layer (36) and a noble metal portion (38). The electrode (26) is deposited over a thin-film buffer layer (24), which contains a layered superlattice material. The buffer layer is interposed between a substrate (22) and the bottom electrode (26). A process of manufacture includes deposition of a liquid precursor on the substrate (22) prior to formation of the bottom electrode (26).</p> |
| 申请公布号 |
EP0834196(A1) |
申请公布日期 |
1998.04.08 |
| 申请号 |
EP19960918175 |
申请日期 |
1996.06.06 |
| 申请人 |
SYMETRIX CORPORATION;MATSUSHITA ELECTRONICS CORPORATION |
发明人 |
AZUMA, MASAMICHI;PAZ DE ARAUJO, CARLOS, A.;CUCHIARO, JOSEPH, D. |
| 分类号 |
H01L27/04;H01L21/02;H01L21/822;H01L23/532;H01L27/115;(IPC1-7):H01L23/532;H01L29/92;H01L21/320 |
主分类号 |
H01L27/04 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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