| 摘要 |
PROBLEM TO BE SOLVED: To fast simulate the operation of a circuit in the parallel processing by extracting a part undergoing the synchronous processing according to a signal change as a synchronous part, extracting a part which performs the signal assignment within the synchronous part as a signal assignment part, and then dividing the signal assignment part from a sequence processing description. SOLUTION: A sequence processing decision part 1 decides whether or not a sequence processing description is included in the description of an HDL (hardware description language). If the sequence processing description is included in the HDL description, a division deciding part 2 decides whether or not the sequence processing description can be divided when the description includes a part that undergoes the synchronous processing in response to a signal change and then extracts this part as a synchronous part. A signal information acquisition part 3 extracts a part which performs the signal assignment within the synchronous part extracted at the part 2 as a signal assignment part. Then a division part 4 divides the signal assignment part extracted at the part 3 from the sequence processing description. |
