FLASH MEMORY DEVICE WITH MULTIPLE CHECKPOINT ERASE SUSPEND LOGIC

摘要

A flash memory device (10) includes a multiple checkpoint erase suspend algorithm. A user may issue an erase suspend command at any time during an erase process. Erase suspend logic (15) is coupled to an erase logic (12) and executes an erase suspend procedure which interrupts the block erase procedure after receiving the erase suspend commande during the first to occur of a set of checkpoints in the block erase procedure. After interrupting the block erase procedure, the erase suspend procedure includes returning to the block erase procedure to complete the block erase.