| 摘要 |
PURPOSE:To realize high integration, by disposing a power source line and an earth line horizontally on a central part and forming a recessed/projected region on a series of cells to make a wiring region small. CONSTITUTION:A power source line 2 is disposed horizontally in a constant width on a central part of a cell by the use of a metallic wiring on a first layer. An earth line 4 is also disposed horizontally in a constant width on the central part of the cell by the use of the metallic wiring on the first layer. Input lines 6, 8 are disposed vertically by the use of polycrystalline silicon. Thereupon, gate electrodes of all MOSFETs existing in a standard cell are disposed vertically. A recessed/projected region is thus formed on a series of cells. When one portion of a wiring region is assigned to the recessed/projected region, the wiring region can be made smaller than conventionally. Hence, high integration can be realized. |
