MULTIPLE WRITES PER A SINGLE ERASE FOR A NONVOLATILE MEMORY

摘要

A method of performing multiple writes before an erase to a nonvolatile memory cell is described. A first bit is stored at a first level of a nonvolatile memory cell (110, 120, 130 and 140). A second bit is stored at a second level of nonvolatile memory cell (110, 120, 130 and 140). A method of erasing a nonvolatile memory cell is also described. A level indicator that indicates the next level of the nonvolatile memory cell to write to is incremented. A method of reading a nonvolatile memory cell includes recalling a level indicator. The nonvolatile cell is then sensed at a level indicated by the level indicator to determine the state of the memory cell.