发明名称 |
Apparatus for processing instructions in a computing system |
摘要 |
A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit. A bypass circuit for bypassing the second instruction storing circuit is also provided.
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申请公布号 |
US5604909(A) |
申请公布日期 |
1997.02.18 |
申请号 |
US19930168744 |
申请日期 |
1993.12.15 |
申请人 |
SILICON GRAPHICS COMPUTER SYSTEMS, INC. |
发明人 |
JOSHI, CHANDRA;RODMAN, PAUL;HSU, PETER;NOFAL, MONICA R. |
分类号 |
G06F9/32;G06F9/38;(IPC1-7):G06F9/00 |
主分类号 |
G06F9/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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