发明名称 OBERFLÄCHENMONTAGE UND FLIP-CHIP-TECHNOLOGIE
摘要 An integrated circuit chip has full trench dielectric isolation of each portion of the chip. A heat sink cap (100) is attached to a diamond passivation layer (96) on the substrate front side surface. The passivation layer is a CVD diamond film which provides both electrical insulation and thermal conductivity. In a flip chip version, frontside electrical contacts (174a, 174b) extend through the frontside passivation layer to the heat sink cap. In a surface mount version, vias are etched through the substrate, with surface mount posts (90a, 90g) formed on the vias, to contact the frontside electrical contacts and provide all electrical contacts on the substrate backside surface. The wafer is then scribed into die in both versions without need for further packaging.
申请公布号 DE707741(T1) 申请公布日期 1996.11.28
申请号 DE19950918863T 申请日期 1995.05.04
申请人 SILICONIX INC., SANTA CLARA, CALIF., US 发明人 CHANG, MIKE, F., CUPERTINO, CA 95014, US;OWYANG, KING, ATHERTON, CA 94026, US;HSHIEH, FWU-IUAN, SARATOGA, CA 95070, US;HO, YUEH-SE, SUNNYVALE, CA 94086, US;DUN, JOWEI, SAN JOSE, CA 95127, US;FUESSER, HANS-JUERGEN, D-89547 GERSTETTEN-DETTINGEN, DE;ZACHAI, REINHARD, D-89312 GUENZBURG, DE
分类号 H01L21/822;H01L23/29;H01L23/367;H01L23/373;H01L23/48;H01L23/485;H01L27/04 主分类号 H01L21/822
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