发明名称 Verfahren zur Herstellung einer Halbleitervorrichtung mit Lotanschlussdrähten aus unterschiedlichen Materialien
摘要 Disclosed is a semiconductor device comprising a semiconductor integrated chip (11) having at least a power processing circuit (12b) in which larger current flows and a signal processing circuit (12a) in which smaller current flows each having bonding pads (15 and 16), a package having leadframes (14 and 17) on which the semiconductor integrated chip (11) is mounted, and a plurality of bonding wires (15 and 16) with different materials through which the bonding pads (13a and 13b) are joined to the leadframes (14 and 17). <IMAGE>
申请公布号 DE69119946(D1) 申请公布日期 1996.07.11
申请号 DE1991619946 申请日期 1991.03.15
申请人 KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP 发明人 OTA, MASAKI, IBO-GUN, HYOGO-KEN, JP
分类号 H01L21/60;H01L21/607;H01L23/49;H01L23/495 主分类号 H01L21/60
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