发明名称 DIVISION METHOD FOR DIVIDER
摘要 PURPOSE: To provide a division method by divider by which the division speed of divider can be increased by calculating the number of times of arithmetic routines without shifting any data. CONSTITUTION: Registers 1 and 2 of (n) bits are provided, first of all, a divisor (a) is inputted to the register 1 and further, the sequence of '0' with eight bits is added to the data in this register 1 by the register 2 so that the data of 2n bits can be generated. By extracting the data of (n) bits while shifting these data to the left one by one, from the most significant bit, the data similar to the case that the bits of data like (a) are conventionally shifted one by one, can be extracted at the same time. A selector circuit 3 simultaneously extracts from the data in the case shifted to the left '0' bit to the data shifted to the left (n-1) bits and compares those data with the data of a dividend (b) stored in a register 4. Then, the maximum data, of which digits of the divisor (a) do not overflow, and which satisfies the condition of b>=a, are decided and a number N of data shifted to the left is outputted.
申请公布号 JPH08152995(A) 申请公布日期 1996.06.11
申请号 JP19940315702 申请日期 1994.11.25
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 TANAKA YOICHI
分类号 G06F7/537;G06F7/52;G06F7/535;G06F7/72 主分类号 G06F7/537
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