发明名称 Nonvolatile semiconductor memory for positively holding stored data
摘要 A semiconductor memory has a plurality of word lines, a plurality of bit lines, a plurality of memory cells, a differential sense amplifier, and load transistors. Each of the memory cells is a MIS transistor formed at each intersection of the word and bit lines. The threshold voltage of the MIS transistor is externally electrically controllable. The differential sense amplifier senses data stored in a selected memory cell located at an intersection of selected word and bit lines. A control pulse signal is applied to the gates of the load transistors, to bias the bit lines. The pulse width of the control pulse signal is a minimum essential to read data out of the selected memory cell. The control pulse signal controls the switching of the load transistors, to shorten a period during which a stress voltage is continuously applied to the drains of unselected memory cells that are connected to the bit line to which the selected memory cell is connected.
申请公布号 US5519652(A) 申请公布日期 1996.05.21
申请号 US19930158796 申请日期 1993.12.01
申请人 FUJITSU LIMITED;FUJITSU VLSI LIMITED 发明人 KUMAKURA, SINSUKE;OGAWA, YASUSHIGE;AKAOGI, TAKAO;CHIDA, TETSUYA
分类号 G11C17/00;G11C16/06;G11C16/26;G11C16/28;G11C29/00;G11C29/06;G11C29/50;G11C29/56;(IPC1-7):G11C11/34 主分类号 G11C17/00
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