| 摘要 |
<p>A memory system having an input buffer (40), an address counter (50), an address decoder (60), and a memory-cell array (10). Address signals are supplied to the memory-cell array (10). In the system, a true-address data determining section (1) has wires or a circuit storing an internal address specific to the system. A false-data generating circuit (2) generates false data when the internal address is in a false data area, and the false data is input to an output selecting circuit (4). A true-address data area detecting circuit (3) compares the true-address data EAi with the internal address consisting of the address signals supplied from an address counter (50), and generates a signal REAL when the internal address is in a true-address data area. The output-selecting circuit (4) selects the false data or the data read from the memory-cell array (10) through a sense amplifier (20), in accordance with whether the signal REAL is at high level or low level. The data stored in the memory-cell array (10) consists of true data items and false data items. Hence, even if the data is copied into a conventional semiconductor memory device, it cannot be used in practice. <IMAGE></p> |
