| 摘要 |
A repeater station comprises an RFD frame synchronization circuit, an AND gate, and an IFD frame synchronization circuit. The RFD frame synchronization circuit outputs a frame synchronization signal indicating the timing of an auxiliary signal by performing frame synchronization with regard to the RFD. The AND gate inhibits clock signals during periods of the auxiliary signals and allows the clock signals to pass through during the other periods. The IFD frame synchronization circuit performs frame synchronization of the RFD with regard to the IFD by carrying out frame synchronization operation in accordance with the clock signals output from the AND gate. The IFD are accessible in the above simple construction.
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