| 摘要 |
PURPOSE: To obtain a PWM signal generator in which a plurality of fixed periods can be set by adding output data from a PWM signal data circuit to determine data required for a plurality of different control operations and setting the data thus determined in a register means. CONSTITUTION: When a DUTY data generated from a PWM signal data output circuit 20 is delivered to a first PWM signal output terminal PWM1.OUT, an adder 63 adds the data of a latch 78 to the DUTY data every time when the data of the latch 78 matches the count in a free run counter 26. The sum is set again in the latch 78 and 1 is added to the sum before being compared with the count in the free run counter 26. The operation is repeated. Similarly, in the case of a second PWM output terminal PWM2.OUT, the adder 63 adds the data of a latch 79 to the DUTY data every time when the data of the latch 79 matches the count in the free run counter 26. The sum is set again in the latch 79 and compared with the count in the free run counter 26. The operation is repeated and a PWM signal having a plurality of fixed periods is generated. |
