发明名称 Circuit activity driven multilevel logic optimization for low power reliable operation
摘要 A method and apparatus for optimizing a boolean network. The boolean network contains a plurality of functions and a plurality of nodes. Any cube-free divisors (a divisor in which no cube divides the divisor evenly) in the boolean network which apply to at least two of the functions are located (108). The greatest divisor, which is defined as the cube-free divisor which brings about the largest net savings, is determined (114). The net savings comprises both an area savings component and a power savings component. Once the greatest divisor is determined, it is replaced with a variable in each of the functions (116) and added to the boolean network as a new function to create an optimized boolean network (118).
申请公布号 US5487017(A) 申请公布日期 1996.01.23
申请号 US19930018984 申请日期 1993.02.18
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 PRASAD, SHARAT;ROY, KAUSHIK
分类号 G06F17/50;H03M5/20;(IPC1-7):H03M5/00 主分类号 G06F17/50
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