forming a gate electrode; passivating the first insulating film having the first etching rate; executing a patterning process by remaining the first insulating film only on the gate electrode of semiconductor device; passivating the second insulating film same etching rate as the first insulating film on the pattern formed at the third process; passivating the third insulating on the pattern formed at the fourth process; executing an spacer etching process for the second and the third insulating film to have a predetermined rate.
