发明名称 |
Logic simulation method |
摘要 |
A logic simulation method and apparatus for sequentially performing a high-speed simulation of a logic circuit designed through sequential processing descriptions. An operation control unit corresponds to each of a plurality of operations described in sequential processing descriptions. The operation control unit controls a start of an operation and determines an end of the operation. After determining an end of a first operation by simulating operation of the operation control unit corresponding to the first operation, a next operation described in sequential processing descriptions is simulated concurrently with simulating an operation control unit corresponding to the next operation until all operations have been sequenced through.
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申请公布号 |
US5475832(A) |
申请公布日期 |
1995.12.12 |
申请号 |
US19940233981 |
申请日期 |
1994.04.28 |
申请人 |
FUJITSU LIMITED |
发明人 |
SHOJI, MINORU;HIROSE, FUMIYASU |
分类号 |
G06F11/25;G06F17/50;(IPC1-7):G06F9/44 |
主分类号 |
G06F11/25 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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