| 摘要 |
PURPOSE:To increase the current of a memory cell without hindering high density by possessing a bipolar transistor between a NAND-type memory cell and a bit line. CONSTITUTION:The row of memory cells consists of the series-connection circuit of a plurality of gate electrodes 104 installed on a semiconductor substrate 101 or an n well 102, an n<+>-type impurity region 105, and a plurality of transistors. For a bipolar transistor, the base region 113 made in contact with the n<+>-type impurity region 105 and the contact p<+>-type impurity region 115 made within the surface area of the base region 113 are made emitter regions. The bit line 116 extended on an interlayer insulating layer 108 is connected to the contact n<+>-type impurity region 115 through a contact opening 109a. Therefore, the current of a memory cell is taken out onto the bit line 116 after being amplified in the bipolar transistor connected to one end of the row of the memory cells. Accordingly, the current of the memory cell can be increased without high density being hindered. |
