发明名称 DEVICE AND METHOD PROCESSOR CONTROL
摘要 PURPOSE:To execute a program, described by a different instruction system, by the same processor without increasing memory capacity. CONSTITUTION:The program described by the 32-bit width instruction system is stored in a 32-bit instruction memory 2, and a program described by an 8-bit width instruction system is stored in an 8-bit width instruction memory 3; and a multiplexer 7 selects and outputs the low-order 8 bits of the output of the instruction memory 2 or 8 bits of the output of the instruction memory 3 according to the switching signal 5 outputted by an interruption control part 10 and an instruction decoder 8 decodes instruction data and outputs a control signal 9 on the basis of one of the 32-bit width instruction system and 8-bit width instruction system according to the switching signal 5.
申请公布号 JPH07306782(A) 申请公布日期 1995.11.21
申请号 JP19940098283 申请日期 1994.05.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHIKAWA TOSHIHIRO
分类号 G06F9/30;G06F17/10 主分类号 G06F9/30
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