发明名称 Power control technique for a computer system to provide adjustable storage and non-storage access times and an adjustable processor idle time
摘要 A power control apparatus having a plurality of external devices and adapted to be used for a computer system and to reduce the power consumption in an idle state, the apparatus includes a processing unit for receiving a signal from at least one of the plurality of external devices and for outputting an instruction according to the received signal, a storage unit connected to the processing unit for temporary storing information and for accessing to the processing unit according to the instruction output from the processing unit, an interface unit connected to both the processing unit and the storage unit for controlling an interface between the processing unit and the storage unit, and an adjusting unit connected to the interface unit for adjusting a time proportion of an access cycle to a non-storage unit, for adjusting a time proportion in an operation of the processing unit to be stopped, and for adjusting an access to the storage unit.
申请公布号 US5432947(A) 申请公布日期 1995.07.11
申请号 US19930066303 申请日期 1993.05.21
申请人 SHARP KABUSHIKI KAISHA 发明人 DOI, KATSUO
分类号 G06F1/32;G06F12/08;G06F15/78;(IPC1-7):G06F13/10 主分类号 G06F1/32
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