发明名称 |
FORMATION OF MULTILAYER RESIST PATTERN AND MANUFACTURE OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE:To provide a method of forming a multilayer resist pattern which enables formation of a lower layer resist pattern and an upper layer resist pattern to a desired pattern configuration. CONSTITUTION:After a lower layer resist pattern 6 is formed and the lower resist pattern 6 is heated baked to a temperature exceeding a glass dislocation temperature, an upper resist pattern 7 is formed on the lower layer resist pattern 6 whose crystallinity is improved by heating. |
申请公布号 |
JPH07169669(A) |
申请公布日期 |
1995.07.04 |
申请号 |
JP19930313099 |
申请日期 |
1993.12.14 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
NAKATANI MITSUNORI;KOJIMA YOSHIKI;NAKANO HIROBUMI |
分类号 |
G03F7/26;H01L21/027;H01L21/28;(IPC1-7):H01L21/027 |
主分类号 |
G03F7/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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