发明名称 DATA WRITER AND READER
摘要 <p>PURPOSE:To reduce the changing frequency of bit states at the time of program writing and to extend the service life of a rewritable ROM by counting the number of bits '0' and the number of bits '1', and when the number of bits '0' is less than the number of bits '1', writing data without inverting them. CONSTITUTION:The number of bits '0' out of all program data obtained from data lines D0 to D7 connected from a data bus 15 to an EPROM 14 is counted, and when the number of bits '0' is smaller than a half of all bits constituting the EPROM 14, all program data are written in the EPROM 14 while holding the output of an inversion control circuit 17 at a low level. When the number of bits '0' is larger than a half of all the bits, the output of the circuit 17 is turned to a high level and all the program data are inverted and written in the EPROM 14. Since the changing frequency of bits constituting the EPROM 14 from '1' to '0' can be reduced, stress can be reduced and the life of the EPROM 14 can be extended.</p>
申请公布号 JPH0745085(A) 申请公布日期 1995.02.14
申请号 JP19930189722 申请日期 1993.07.30
申请人 TEC CORP 发明人 HORI FUSAO
分类号 G11C17/00;G11C16/02;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
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