发明名称 PAD STRUCTURE WITH PARASITIC MOS TRANSISTOR FOR USE WITH SEMICONDUCTOR DEVICES
摘要 <p>An ESD protection device for protecting semiconductor devices from electrostatic discharge includes a metal pad (12) of the semiconductor device, a first charge sink (71, 72), and a first MOS transistor (12, 67, 22, 69, 33). The first MOS transistor (12, 67, 22, 69, 33) is placed under the metal pad (12). The first MOS transistor (12, 67, 22, 69, 33) is coupled as a switch between the first charge sink (71, 72) and the metal pad (12). In addition, the metal pad (12) operates as a gate of the first MOS transistor (12, 67, 22, 69, 33). Upon static electricity of a high magnitude of voltage being placed on the metal pad (12), the first MOS transistor (12, 67, 22, 69, 33) turns on and the static electricity is discharged to the first charge sink (71, 72).</p>
申请公布号 WO1995003625(A1) 申请公布日期 1995.02.02
申请号 US1994006271 申请日期 1994.06.03
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