Memory device programming apparatus.

摘要

Programming apparatus for providing an EEPROM programming signal, comprises a charge pump circuit (20) for receiving a programming input signal on a programming input line (14) and for charging up a gate drive voltage signal in response to a rising edge of the programming input signal. A transistor (52) which includes a gate coupled to the gate drive signal couples the programming input line (14) to a programming output line (130), which is coupled to an EEPROM. A ramp control circuit (58) including a capacitor (54) and a transistor (48) controlling the flow of current through the capacitor (54), is coupled to the programming output line (130) for regulating a ramp-up rate of a programming output signal on the programming output line (130). A ramp-down circuit (92) is coupled to the programming input line (14) and to the programming output line (130) and is responsive thereto for providing a ramp-down of the programming output signal after the programming input signal goes low. <IMAGE>