发明名称 LOGICAL FUNCTION CIRCUIT
摘要 PURPOSE: To discriminate whether a logic circuit and flip flops are correctly operated or not by checking logical result data, based on latched scan data and test data. CONSTITUTION: An XOR gate of a first logic circuit L1 operates exclusive OR between data of an input signal CI1 and data latched in N flip flop FN1. An AND gate operates AND among data of the input signal CI1, data latches in all N-th flip flops of preceding columns, and data latched in an N-th flip flop of a particular column. Respective exclusive ORs are transferred to an input terminal D of a first row flip flop through a related multiplexer and are latched in accordance with a clock pulse CLOCK. When a selection signal SEL changes its logical state, an input multiplexer MI selects the input signal CI2 and supplies it to logic circuits L1 to LM. Thus, pulses of an input signal CIN are counted, and a carry-out signal CAN is supplied in accordance with the signal SEL.
申请公布号 JPH06311130(A) 申请公布日期 1994.11.04
申请号 JP19930088152 申请日期 1993.03.23
申请人 NORTHERN TELECOM LTD 发明人 MIKAERU JIYOSEFU MAKUDONERU;ARISU TONBURU
分类号 H03K19/00;G01R31/28;G01R31/3185;G06F11/22;H04J3/02;H04J3/14;H04J3/17;(IPC1-7):H04J3/14 主分类号 H03K19/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利