| 摘要 |
PURPOSE:To attain automatic detection with comparatively simple constitution by comparing the phase of a read data synchronously with a synchronizing signal of a variable frequency oscillation circuit (VFO) and an output of the VFO via a FF and a gate. CONSTITUTION:An input signal synchronizing circuit 4 outputs a data A synchronously with a signal C by using the read data A and the synchronizing signal C of a VFO 1. The output is outputted via a shift register 52 formed by a latch D FF 51 of an unlock automatic detector 5 and a multi-stage D FF having a number of stage decided in response to the interval of data A and a clock signal width. Then the phase difference between the Q output of the 1st stage FF of the register 52 and the output of the circuit 4 is compared by an AND gate 55 and when there is a phase deviation between both the outputs, an unlock state detection signal (a) is outputted via an OR gate 56 and the unlock state of the VFO is detected automatically with comparatively simple constitution. |
