发明名称 Aborting synchronizer
摘要 A N-stage synchronizer for synchronizing asynchronous signals in a destination system's time domain. The synchronizer has N-stages with each stage having a series connected logic gate and flip-flop, and each of the N-stages are connected in series. Each logic gate has the output of the previous stage input thereto along with an ABORT signal. The ABORT signal when asserted blocks the synchronization of the asynchronous signal. The synchronizer permits a reduction in the latency associated with the synchronization process while not affecting reliability.
申请公布号 US5305354(A) 申请公布日期 1994.04.19
申请号 US19920874237 申请日期 1992.04.24
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 THALLER, KURT M;GODIWALA, NITIN D.
分类号 G06F9/38;H04L7/02;(IPC1-7):H04L7/00 主分类号 G06F9/38
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