发明名称 |
Electronic digital circuit for addition and subtraction - has shift register and four bit processing circuit operated by pulse generating control circuit for repeated operations |
摘要 |
The electronic arithmetic processing circuit is used to perform both addition and subtraction of numbers in binary code. The processing circuitry is based upon a main circuit that has a shift register (25), two memory arrays and a four bit stage that can be switched between addition and subtraction. Alternatively, separate addition and subtraction circuits may be used. The processing arrangement can be used together with a pulse generating circuit that allows multiple additions and subtractions to be made. USE/ADVANTAGE - Simplifies process for repeated additions and subtractions.
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申请公布号 |
DE4230855(A1) |
申请公布日期 |
1994.03.17 |
申请号 |
DE19924230855 |
申请日期 |
1992.09.15 |
申请人 |
MERKLE, PAUL, 71065 SINDELFINGEN, DE |
发明人 |
MERKLE, PAUL, 71065 SINDELFINGEN, DE |
分类号 |
G06F7/491;G06F7/50;G06F7/52;G07G1/12;(IPC1-7):G06F7/50 |
主分类号 |
G06F7/491 |
代理机构 |
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地址 |
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