发明名称 LEAD FRAME FOR SEMICONDUCTOR DEVICE
摘要 <p>PURPOSE:To avoid the vertical movement of a chip during the resin sealing step by a method wherein an inner lead is arranged extending over the center line of the chip for increasing the bonding area of the inner lead onto a both side adhesive tape. CONSTITUTION:The end region (whereto an Au wire 4 is connected) 1a of an inner lead 1 extending over the center line of a chip 2 and the intermediate part 1b of the inner lead 1 are bonded onto the chip 2 through the intermediary of a both side adhesive tape 3. Thus, the bonding area of the inner lead 1 onto the tape 3 is to be increased. Through these procedures, the adhesion of the chip 2 to the inner lead 1 can be augmented simultaneously spreading out longer inner lead 1 on the chip 2 so that the vertical movement of the chip 2 to the title lead frame for semiconductor device can be avoided.</p>
申请公布号 JPH05315530(A) 申请公布日期 1993.11.26
申请号 JP19920121513 申请日期 1992.05.14
申请人 NEC CORP 发明人 ICHISE MASAHIKO
分类号 H01L21/56;H01L23/28;H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L21/56
代理机构 代理人
主权项
地址
您可能感兴趣的专利