发明名称 |
Package having a structure for stabilizing and/or impedance-matching a semiconductor IC device accommodated therein |
摘要 |
A packaged semiconductor device has a package, a semiconductor IC chip disposed in a space formed in the package, a strip conductor buried at a first level in the package for carrying a signal to be coupled to the IC chip, a first reference potential conductor buried at a second level in the package for providing a reference potential for the IC chip and a second reference potential conductor buried at the first level in the package for shielding the strip conductor. A connection conductor such as a bonding wire is provided across the second reference potential conductor for connecting the IC chip with one of the ends of the strip conductor. A dielectric material is provided between the connection conductor and the second reference potential conductor to provide the connection conductor with a characteristic impedance matched with an impedance of a source of the signal the connection conductor carries. The package may have an interconnecting conductor extending to electrically connect the first and second reference potential conductors.
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申请公布号 |
US5225709(A) |
申请公布日期 |
1993.07.06 |
申请号 |
US19910715068 |
申请日期 |
1991.06.13 |
申请人 |
HITACHI, LTD.;HITACHI VLSI ENGINEERING CORPORATION |
发明人 |
NISHIUMA, MASAHIKO;KAMADA, CHIYOSHI |
分类号 |
H01L23/12;H01L21/60;H01L23/49;H01L23/64 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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