| 摘要 |
A cache LSI has an expansion pin which is set to "0" (GND) level or "1" (Vcc) level. A portion of a SET field of a cache directory is used as a field for selecting a cache LSI. Each cache LSI includes a determination circuit. The determination circuit performs a predetermined logical operation based on a level signal set at the expansion pin and a level signal of the cache selection field in the SET field, and determines whether or not an intra-chip is selected.
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