发明名称 RESET CIRCUIT
摘要 <p>PURPOSE:To provide the reset circuit preventing a malfunction sending a reset signal to a microcomputer when the microcomputer is shifted from a clock oscillation stopping state to a clock oscillation state. CONSTITUTION:The reset circuit is provided with a monostable flip-flop circuit 5 performing the triggering by an external interruption signal to a microcomputer 1 and an AND circuit 6 taking the AND between the output signal of this monostable flip-flop circuit 5 and the output signal of an external reset circuit 3. The transmission of the reset signal from the external reset circuit 3 to the microcomputer 1 through the AND circuit 6 is inhibited at the time of shifting from the clock oscillation stopping state to the clock oscillation state by the external interruption signal.</p>
申请公布号 JPH0573176(A) 申请公布日期 1993.03.26
申请号 JP19910257263 申请日期 1991.09.10
申请人 SHARP CORP 发明人 YAMAZAKI YOSHIYUKI
分类号 G06F1/24;G06F1/04 主分类号 G06F1/24
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