| 摘要 |
PURPOSE: To reduce a voltage drop on a chip and to prevent a custom capacitor from being wasted by a die which has failed a package test by arranging the custom capacitor on the top surface of the chip or below the chip. CONSTITUTION: A microchip 12 has a top surface 11 and a reverse surface 13, and a power source connection 14 and a power return connection 16 in the shape of a bonding pad are on the top surface 11. The custom capacitor 20 is placed directly on the inactivated top surface 11 and stuck physically with a binder. Here, the power connection 14 is connected to a terminal 22 with a wire bond 26, and the power return connection 16 is connected to a terminal 24 with a wire bond 28. The terminals 22 and 24 form a terminal pair 23 and the custom capacitor 20 is designed with the terminal pair 23 for a Vdd -Vss pair 30, which is formed of a combination of a power source Vdd and an adjacent return Vss . Consequently, a decoupling capacitor can be used as an option to eliminate the need for addition, until after a package test. |
