| 摘要 |
<p>PURPOSE:To execute fault detection concerning a CPU in an operation mode and further to prevent a fault from being erroneously judged concerning the CPU in a standby mode at the fault detector for a controller equipped with the CPU which can switch the two modes of the operation mode and the standby mode. CONSTITUTION:In the operation mode, a CPU 11 outputs not only a clock signal 15 but also a clear signal 16 periodically so as to show the execution of a normal operation and on the other hand, both clock signal 15 and clear signal 16 are stopped being outputted in the standby mode. A counter 21 counts the clock signal 15 and only when the relevant count value changes and exceeds a prescribed value without being cleared by the clear signal 16, a reset signal 24 is outputted through a one-shot multi-vibrator 22 to the CPU 11.</p> |
