发明名称 HYBRID DECODER
摘要 PURPOSE:To reduce the memory capacity. CONSTITUTION:After hybrid coding data are stored in a smoothing buffer 10 tentatively, the data are subject to variable length decoding by a variable length decoder 20. The data subject to variable length decoding are stored in one of block memories 71-74 selected by a selector 31. The block stored in one of block memories 71-74 selected by a selector 32 is inversely quantized by an inverse quantizer 50 and subject to inverse DCT by an inverse DCT device 60. The data subject to inverse DCT are stored one frame in either of frame memories 41 and 42 selected by a selector 33 and read from the other of the frame memories 41, 42 selected by a selector 34. One of the block memories 71-74 selected by a selector 35 is cleared by a memory clear device 80.
申请公布号 JPH0564176(A) 申请公布日期 1993.03.12
申请号 JP19910242378 申请日期 1991.08.29
申请人 NEC HOME ELECTRON LTD 发明人 SHIBANO MOTOYOSHI
分类号 H03M7/40;G06T9/00;H04N1/41;H04N7/26 主分类号 H03M7/40
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