| 摘要 |
PURPOSE:To eliminate the level difference among color read-in signals, by adjusting the picture projection storage time of a solidstate image sensor for every color filter and further adjusting the read-in signal level for every color filter. CONSTITUTION:A clock control circuit 10b adjusts the storage time for a CCD element 6. Further, one set of operational amplifier 8 only is inserted between a preamplifier 7 and a binary circuit 9. The output of the circuit 9 is transmitted on three parallel lines depending on chroma signal at AND gates AN1-AN3, and each of the gates AN1-AN3 is ON-controlled with the respective output of AN7-AN9. The gate AN1 outputs only the readout binary signal immediately after the storage time of tR, the gate AN2 outputs that immediately after the storage time in tG, and the gate AN3 outputs that in tB. |
