发明名称 EXCESSIVE ERROR CORRECTION METHOD
摘要 PURPOSE: To automatically execute a complement/re-complement(C/R) error correction method when excess errors are detected in a main storage device MS. CONSTITUTION: The read request of the data unit DU of MS11 is given by a request source. When the excess errors are detected in an ECC logic circuit 13, the request is returned to the request source. The request source requests re-reading. Then, the C/R method is started with the request and reading is executed from MS11, Then, the excess errors are corrected. Then, DU+ECC is stored in a data buffer 21 and the circuit 13 generates a state bit and a parity bit to DU+ECC and they are stored in buffers 24 and 27. When the state bit shows the excess errors, an inverter 32 is activated, DU+ECC from the buffer 21 is inverted and it is stored in the corresponding position of MS 11. Then, DU+ECC which is inverted again in an inverter 12 is stored in the buffer 21 and it is stored in MS in second reading.
申请公布号 JPH04338849(A) 申请公布日期 1992.11.26
申请号 JP19920049858 申请日期 1992.03.06
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 TOOMASU MACHIYUU BUREI;MACHIYUU ANSONII KURIGOUSUKI;BURUUSU ROIDO MAKUGIRUBUREI;TORIN FUI GUEN;UIRIAMU UU SHIEN;AASAA JIEEMUZU SATSUTON
分类号 G06F11/10;G06F11/07;G06F11/16;G06F12/16 主分类号 G06F11/10
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