发明名称 CONTROL SYSTEM FOR PRIORITY CONTROL BUFFER IN ATM SWITCH
摘要 <p>PURPOSE:To detect a fault of a missing number or a duplicate number of a priority control buffer of an ATM switch and to restore the system with simple constitution with respect to the control system of the priority control buffer in the ATM switch implementing the priority control of a buffer by means of a FIFO provided corresponding to a quality class and provided with one buffer to each cross point. CONSTITUTION:This system is provided with an idle/busy management table 5 by class classifications indicating whether or not a cell is written corresponding to a buffer address and when an input cell is written in a buffer 1, the idle/busy management table 5 by the class classifications detects an idle address and the display of an address corresponding to the table 5 is updated in the case of write/read of a cell to/from the buffer 1.</p>
申请公布号 JPH04220834(A) 申请公布日期 1992.08.11
申请号 JP19900412364 申请日期 1990.12.20
申请人 FUJITSU LTD 发明人 TOMONAGA HIROSHI;KATO YUJI;KUSAYANAGI MICHIO
分类号 H04Q11/04 主分类号 H04Q11/04
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