| 摘要 |
<p>PURPOSE:To improve the efficiency of a program memory and to shorten the interrupt handling time by providing an interrupt control circuit with a multiplexer which inputs the output of a means, which sets an interrupt address to an area other than an instruction memory with respect to each interrupt factor, to a program counter. CONSTITUTION:This processor is provided with a program counter 1, a stack 2, an instruction ROM 3, an instruction decoder 4, an interrupt detecting circuit 5, an interrupt control register 6, a stack pointer 7, an address setting circuit 8, and a multiplexer 9. The address setting circuit 8 consists of a read only memory including addresses ADD.1, ADD.2,...ADD.K, and ADD.n and sets an interrupt address for each interrupt factor. The multiplexer 9 uses the interrupt factor detected by the interrupt detecting circuit 5 as a select signal to input the output of the address setting circuit 8 to the program counter 1. Thus, the efficiency of the program memory is improved and the interrupt handling time is shortened.</p> |
