| 摘要 |
PURPOSE:To attain a high speed transmission line fault circuit by allowing only a node at both ends of a transmission line to revise a mapping table automonously at the detection of a fault of the transmission line. CONSTITUTION:When a fault takes place in a transmission line 126 and the fault is detected between nodes 103,104 at both ends of the faulty transmission line 126, the link state of a VPI is revised. That is, the node 103 applies control so that the linking between an input VPIX12 and an output VPIY11 and the linking between an input VPIX22 and an output VPIY21 are valid and the node 104 applies control so that the linking between an input VPIX12 and an output VPIY14 and the linking between an input VPIX23 and an output VPIY24 are valid. Simultaneously, the linking between X12 and X22 and the linking between X22 and X23 are normally made invalid. Thus, a bypass is formed by having only to revise only a virtual path mapping table of nodes at both ends of a faulty transmission line only when a fault takes place through the setting of the bypass and a virtual path number on the bypass with respect to every fault pattern. |
